You can do it while using microcode patches and software mitigations or not: it’s a hardening measure because SMT usually shares TLBs and L1s between threads.
No SMT, no sharing of TLBs and L1s (I know that writing it this way is a gross oversimplification).
No SMT, no sharing of TLBs and L1s (I know that writing it this way is a gross oversimplification).