4.0 and 5.0 are developed concurrently, 4.0 being at revision 0.9 and 5.0 being at 0.3.

So why would anyone use 4.0? Or 4.0 is more like a stop gap for HPC, Network applications? Where the need for higher bandwidth interconnect is urgently needed. Intel don't even plan to have 4.0 on selected CPUs until late 2018. And AMD are moving to 4.0 until 2019.

They might as wel wait a year and have 5.0

"If PCI-SIG hits its target goal of a 2019 standard finalization date, PCIe 5.0 could be in-market by 2020 or 2021"

https://www.extremetech.com/computing/250640-pci-sig-announc...

I wonder if it could be the case that 5.0 will end up shipping mostly in HPC configurations to compete with various proprietary connector offerings, while 4.0 is what the consumer space sees for some time.

It's also possible that the timing is a result of them expecting far more stalls in the process for 5.0 than cropped up, though there's obviously still plenty of time.

Where can I track this?

SSL error anyone?

Works fine for me.

But holy shit, $4k a year for the privilege of downloading a few specs? This is even more ludicrous than the USB or Bluetooth messes.

USB Mess? Download from http://www.usb.org/developers/docs/ as a zip file. Are you thinking IEEE1394/Firewire which has a significant cost?

It's all fun and games until you need a vendor ID. Because we have a bandwidth of hundreds of megabytes per second, but UUIDs are apparently still to expensive.

But yeah, that's what I meant by USB being better than PCIe. At the very least the specs are publicly downloadable.

Just make like Shenzhen and spoof it!

Or nfc ntag